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ModelSim - a comprehensive simulation and debug environment for complex ASIC and FPGA designs
ModelSim provides a comprehensive simulation and debug environment for complex ASIC and FPGA designs. Support is provided for all languages including Verilog, ...
EDA
VHDL
Verilog
PSL
Electronic Design Automation
SystemC
SystemVerilog
ModelSim
Code Coverage
RTL Design
simulation technology
System-Level Design
Advanced Debugging
Broad Standards Support
HDL simulation tools
www.model.com - 2009-02-13
FirstEDA - Enabling Design - for ASIC & FPGA Designers in the UK & Ireland
FirstEDA specialises in the distribution and support of leading-edge EDA solutions for the design of ASIC and FPGA devices
distribution
UNIX
CAD
distributor
FPGA
EDA
ASIC
VHDL
Verilog
design tools
IC design
chip design
SystemC
SystemVerilog
RTL design
system level design
enabling design
FirstEDA
www.edaforum.com - 2009-02-12
FirstEDA - Enabling Design - for ASIC & FPGA Designers in the UK, Ireland & Northern Europe
FirstEDA specialises in the distribution and support of leading-edge EDA solutions for the design of ASIC and FPGA devices.
distribution
UNIX
CAD
distributor
ESL
FPGA
methodology
EDA
ASIC
VHDL
Verilog
design tools
IC design
Amplify
chip design
SystemC
SystemVerilog
ESDA
Concept Engineering
RTL design
system level design
Synplicity
SLDA
enabling design
FirstEDA
Synplify
GateVision
HyperPlot
SpiceVision
Synplify PRO
Synplify Premier
www.firsteda.com - 2009-02-05
FirstEDA - Enabling Design - for ASIC & FPGA Designers in the UK & Ireland
FirstEDA specialises in the distribution and support of leading-edge EDA solutions for the design of ASIC and FPGA devices
distribution
UNIX
CAD
distributor
ESL
FPGA
methodology
EDA
ASIC
VHDL
Verilog
design tools
IC design
PeriScope
SpyGlass
chip design
SystemC
SystemVerilog
ESDA
Concept Engineering
RTL design
system level design
SLDA
enabling design
FirstEDA
1Team
GateVision
HyperPlot
Summit Design
Atrenta
SpiceVision
www.1st-eda.com - 2009-02-05
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